Blogs
Power of Virtual Prototype
With increasing complexity, chip design is associated with longer development
Portable Stimulus Status Report
Portable Stimulus could be the first new language and abstraction
CircuitSutra: Blending ESL with Current Methodologies
Advanced tools and methodologies have become absolutely essential to achieve
SSD & NAND controller software development using Virtual Prototypes
An interesting article about how Virtual Prototypes provides tremendous benefits
Performance analysis, an important step in SoC design
Achieving the optimum performance and power consumption are important factors
A practical approach to building a Virtual Prototype
This article by Bernard Murphy, is a summary of white
Enabling Effective and Reliable ESL Methodologies to Design Complex SoC
ESL methodologies are a set of advanced methodologies for the
Verification of SystemC models and Virtual Prototypes
A major factor which determines the Success/Failure of current products/systems
SystemC Power modeling with TSMC System-PPA
This is an interesting article about how the SystemC TLM