UVM SystemC for ESL designs ..

Good to see the announcement from Accellera about UVM SystemC.
The standard will enable the effective usage of the advanced verification techniques for the verification of ESL models developed using SystemC, TLM2.0, or to use these ESL models in the verification flows for the verification of RTL. Read more ..

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CircuitSutra Modeling Methodology enables the development of SystemC models that can span multiple use cases: architectural exploration, pre-silicon & post-silicon embedded software development, RTL verification, co-simulation, co-emulation. These models can integrate with all the tools required in the entire ESL design & verification flow. Support for new tools can be added without having to update the model code.

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