Opportunities

Positions:
Sr Engineer: Hybrid & Co-Simulation of SoC platforms
​
Location: Bangalore, Noida

Responsibilities
  • Develop advanced Co-Simulation environment for SoC verification, Firmware development & validation
  • Develop the transactors and adaptors for connecting the transaction level models with RTL designs
  • Develop & debug C / SystemC models
​
Educational Qualification:  Bachelor's / Master Degree in  Electronics Engineering / VLSI 

Experience: 2 - 6 years related experience.

Required Skills:
Must:
  • RTL: Verilog, System Verilog
  • Programming Language: C / C++
  • SoC architecture, Bus protocols, Interfaces

Desirable:
  • SystemC, TLM
  • Adaptors & Transactors development
  • Cosimulation of RTL with C / SystemC models
  • Hybrid: Interfacing Emulation with C / SystemC Models